Flush-based attack optimizations

Presentation-cum-demonstration for Undergraduate Research Project for the Fall 2019 semester taken under Biswa‘s guidance.

Abstract

The processor architecture community has, for decades, focused on providing the best possible performance in the smallest feasible footprint. Recently, though, there has been a shift in ideology. Now, the focus is on providing the optimum balance between performance and energy consumption, keeping the demands and priority of the user in mind. The key here is to tune the processor’s frequency and voltage to reduce energy consumption.

Algorithms to scale power consumption efficiently have been deployed both in hardware and in software. However, these algorithms have once again been designed with performance as the aim. The security aspects have not been paid much attention to, as is clear from the abundance of microarchitectural attacks that have sprung up over the past decade.

Our focus is to analyze the effects of aggressive power scaling algorithms for the benefit and subsequently utilize them for the benefit of an attacker, to improve the accuracy and resolution of cache-based attacks. We critique the flush-based attacks to determine the scope for improvement. We then present a detailed analysis of one of the key components in flush-based attacks.